Advances in the design of integrated circuit dies have created a demand for integrated circuit package designs which can accommodate a large number of interconnections between the package and the substrate without becoming excessively large. An important requirement of these high density integrated circuit package designs is that they maintain a low interconnection failure rate despite the large number of interconnections.
One such high density package design is a surface mount area-array package. This package does not employ formed metal leads. Instead, interconnection between the package and the substrate is provided by an array of metal alloy or electrically conductive polymer based compound terminations which form joints to mechanically and electrically connect the package and the substrate.
One type of such package is a plastic ball grid array (PBGA) package. The substrate of the package is composed of a laminated glass fibre resin structure which has metal traces on the outside and between the laminated layers and vias to interconnect the traces. An integrated circuit die is positioned on top of or adjacent the top of the package substrate and electrically connected to the traces. Through the vias, these traces connect to solder balls typically arrayed in regular concentric rings, usually square in shape, upon the bottom of the PBGA package. The integrated circuit die and the top of the substrate are encapsulated in a molded plastic for mechanical and environmental protection. The PBGA package is mounted upon a substrate employing known procedures such as reflow.
It was known that the solder ball interconnections beneath the integrated circuit die were the first to fail in operation when the PBGA was mounted upon the most commonly used substrate, namely a printed circuit board (PCB) formed with a laminated glass fibre resin based material. A prior solution for attempting to increase electrical reliability was to remove the interconnections which were beneath the die, known in the art as depopulating solder balls. However, this decreases the number of solder ball joints attaching the package to the substrate. The mechanical problem created, of not having sufficient attachment of the package to the substrate, is particularly significant in chip-scale packages (CSP's). A CSP is any package in which the package is only slightly larger than the die.
In Factors Influencing Fatigue Life of Area-Array Solder Joints, by R. Katchmar, E. Goulet and J. Laliberte, presented at 1996 ISHM in Minneapolis, the authors described a process by which they developed a formula for predicting the incremental spring stiffness .DELTA.K.sub.i of the i.sup.th ring of solder balls from the centre of the package. As a result of applying this formula to PBGAs mounted on printed circuit boards, it was theorized that the solder balls under the die should be retained, rather than removed, in order to extend the life of the remaining solder ball connections. However, the formulas published in the paper contained errors; in particular, the formula for calculating .DELTA.K.sub.i was incorrect. Also, no practical solutions have been proposed and the paper is silent with regard to ceramic column grid array (CCGA) packages and CSP's.